6HDD Improvement has been focused on Density.Huge capacity disks with low price and small size still have- Low speed and highenergy consumption (current stage)-Highcapacitycauseshighaccesslatency (formorethan1oyears)SpecificissuesandconcernsCapacity/bandwidth increases significantly,sodoes latency- Space is almost free, but to access data is increasingly more expensive-Economicmodel:adiskshouldbeinfrequentlyaccessedforarchival- DRAMbuffer can address theperformance issues,but notthepowerAfastandlowpowerstorageishighlydesirable
HDD Improvement has been focused on Density • Huge capacity disks with low price and small size still have – Low speed and high energy consumption (current stage) – High capacity causes high access latency (for more than 10 years) • Specific issues and concerns – Capacity/bandwidth increases significantly , so does latency – Space is almost free, but to access data is increasingly more expensive – Economic model: a disk should be infrequently accessed for archival – DRAM buffer can address the performance issues, but not the power • A fast and low power storage is highly desirable. 6
Flash Memory based Solid State Drive Solid State Drive (SSD)-Asemiconductordevice-MechanicalcomponentsfreeTechnicalmerits Low latency (e.g. 75μs)Highbandwidth(e.g.250MB/sec)-Lowpower:0.06(idle)~2.4w (active)-ShockresistanceLifespan:100GB/day →>5years (x25-M)
Flash Memory based Solid State Drive • Solid State Drive (SSD) – A semiconductor device – Mechanical components free • Technical merits – Low latency (e.g. 75µs) – High bandwidth (e.g. 250MB/sec) – Low power: 0.06 (idle)~2.4w (active) – Shock resistance – Lifespan: 100GB/day → 5 years (X25-M) 7
8The ssD cell state changes as voltage changesOxide SidewallPOLY2CONTROLGATEInterPolyTunnelDielectric ONOEachSSDcelOxidePOLY1FLOATINGGATEmade up bytransistorsN+SourceN+DRAINP-Type SiliconSubstrateElectrons are storedin the“floating gate"-AlargevoltagedifferencebetweenSourceandDrainmaintainsalevelofelectronsinthefloatinggate-Thevoltagevolumedeterminesthelevel ofelectrons,whichisthestate of the cell
The SSD cell state changes as voltage changes 8 Each SSD cell made up by transistors • Electrons are stored in the “floating gate” – A large voltage difference between Source and Drain maintains a level of electrons in the floating gate – The voltage volume determines the level of electrons, which is the state of the cell
9Single Level Cell (SLC) vS. Multi-level Cell (MLC)ReferencePointSLCaiOne bitper cell0VtMLCeonnTwo bits per cell00VtSLC:two voltage statesfor 0 and 1 (1 bit per cell)-Lowdensity,highaccessspeed,highendurance,lowpower,highcostMLC: four voltage states for 00, 01, 10, 11 (2 bits per cell)Highdensity,loweredaccessspeed,loweredendurance (1Ox),increasedpower,lowcostTLC: triple level cell, 3 bits in each cell => an enhanced MLC
Single Level Cell (SLC) vs. Multi-level Cell (MLC) 9 • SLC: two voltage states for 0 and 1 (1 bit per cell) – Low density, high access speed, high endurance, low power, high cost • MLC: four voltage states for 00, 01, 10, 11 (2 bits per cell) – High density, lowered access speed, lowered endurance (10x), increased power, low cost • TLC: triple level cell, 3 bits in each cell => an enhanced MLC
10Flash Memory based Solid State DriveArchitecture of solid state drives (SSD) Host interface logic-SATA, IDE, SCSl, etc.ssDController-processor,buffermanager,flashcontroller-Integrated/DedicateRAMbuffer-AnarrayofflashmemorypackagesSSDRAMbufferFlashHostmemorySSDontrollelInterfaceFlashHostProcessorlogicmemoryFlash ctrl.FlashIDE/SATABuffermemoryManagerFlashmemoryAdaptedfromUSENIX'O8(Agrawaletal.)
Flash Memory based Solid State Drive • Architecture of solid state drives (SSD) – Host interface logic – SATA, IDE, SCSI, etc. – SSD Controller – processor, buffer manager, flash controller – Integrated/Dedicate RAM buffer – An array of flash memory packages SSD Adapted from USENIX’08 (Agrawal et al.) Host Interface logic IDE/SATA SSD Controller Processor Buffer Manager Flash ctrl. RAM buffer Flash memory Flash memory Flash memory Flash memory 10 Host