Reason: long latency comesfrom rowbuffer missesProcessorBusbandwidthtimeRowBufferCol.Access(cacheline)TTTTTTIITITDRAMLatencyDRAM CoreRowAccessPrechargeRow buffer hits: repeated accesses in the same pageRow buffer misses: random accesses in different pages
Reason: long latency comes from row buffer misses Precharge Row Access Bus bandwidth time DRAM Core Row Buffer Processor Col. Access (cache line) DRAM Latency • Row buffer hits: repeated accesses in the same page • Row buffer misses: random accesses in different pages
Inabilities forCPUstoacceleraterandomaccessesDo something for Index Operations (random memoryaccesses)1. CachingX.Workingsetislarge(100GB),CPUcacheissmall (10MB)2. PrefetchingXHardtopredictnextmemoryaddress3.MultithreadingLimitednumberofhardwaresupportedthreadsX:Limitedby#ofMissStatusHoldingRegisters(MSHRs)forlargevolumes
Inabilities for CPUs to accelerate random accesses 2. Prefetching 1. Caching 3. Multithreading ๏ Do something for Index Operations (random memory accesses) • Hard to predict next memory address • Working set is large (100 GB), CPU cache is small (10 MB) • Limited number of hardware supported threads • Limited by # of Miss Status Holding Registers (MSHRs) for large volumes